azonenberg:nvidia:mcpx
Differences
This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
azonenberg:nvidia:mcpx [2014/03/09 20:18] – azonenberg | azonenberg:nvidia:mcpx [2015/01/04 22:50] (current) – external edit 127.0.0.1 | ||
---|---|---|---|
Line 10: | Line 10: | ||
* M5 = medium-range vertical interconnect | * M5 = medium-range vertical interconnect | ||
* M4 = medium-range horizontal interconnect | * M4 = medium-range horizontal interconnect | ||
- | * M3 = short-range | + | * M3 = short-range |
- | * M2 = short-range | + | * M2 = short-range |
* M1 = intra-cell routing | * M1 = intra-cell routing | ||
azonenberg/nvidia/mcpx.1394396317.txt.gz · Last modified: 2014/03/09 20:18 by azonenberg