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mcmaster:efabless:sky130-mpw1-wafer

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mcmaster:efabless:sky130-mpw1-wafer [2025/06/25 20:44] – mcmastermcmaster:efabless:sky130-mpw1-wafer [2025/06/25 20:46] (current) – mcmaster
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   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi01_mit2x2.jpg|Single]] (18204x4372, 13.9952MiB)   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi01_mit2x2.jpg|Single]] (18204x4372, 13.9952MiB)
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 [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi03_mit2x2/|mz_roi03_mit2x2]] [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi03_mit2x2/|mz_roi03_mit2x2]]
  
   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi03_mit2x2.jpg|Single]] (17902x5713, 18.8183MiB)   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi03_mit2x2.jpg|Single]] (17902x5713, 18.8183MiB)
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 +{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi05_mit20x2.thumb.jpg}}
  
 [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi05_mit20x2/|mz_roi05_mit20x2]] [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi05_mit20x2/|mz_roi05_mit20x2]]
  
   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi05_mit20x2.jpg|Single]] (19560x5918, 11.6516MiB)   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi05_mit20x2.jpg|Single]] (19560x5918, 11.6516MiB)
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 +{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi06_mit20x2.thumb.jpg}}
  
 [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi06_mit20x2/|mz_roi06_mit20x2]] [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi06_mit20x2/|mz_roi06_mit20x2]]
  
   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi06_mit20x2.jpg|Single]] (21503x14584, 90.7857MiB)   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi06_mit20x2.jpg|Single]] (21503x14584, 90.7857MiB)
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 +{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi08_mit20x2.thumb.jpg}}
  
 [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi08_mit20x2/|mz_roi08_mit20x2]] [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi08_mit20x2/|mz_roi08_mit20x2]]
  
   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi08_mit20x2.jpg|Single]] (3327x10238, 3.24921MiB)   * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi08_mit20x2.jpg|Single]] (3327x10238, 3.24921MiB)
 +
 +{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi09_mit20x2.thumb.jpg}}
  
 [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi09_mit20x2/|mz_roi09_mit20x2]] [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi09_mit20x2/|mz_roi09_mit20x2]]
mcmaster/efabless/sky130-mpw1-wafer.1750884262.txt.gz · Last modified: 2025/06/25 20:44 by mcmaster