Differences

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--- mcmaster:nxp:mcimx6z0dvm09ab [2020/05/04 02:51] – created mcmaster
+++ mcmaster:nxp:mcimx6z0dvm09ab [2023/02/16 10:17] (current) – external edit 127.0.0.1
@@ Line 1: / Line 1: @@
 {{tag>collection_mcmaster vendor_nxp type_unknown year_unknown foundry_unknown}}
+Project sponsored by https://twitter.com/AndreaBarisani
+Thanks!
 ====== Package ======
+"*F*" represents Freescale logo.
 {{:mcmaster:nxp:mcimx6z0dvm09ab:pack_top.jpg?300|}}
 <code>
+     *F*
+MCIMX6Z0DVM09AB
+    CTDB1950
+N70S
+ CHINA MXDBCTJ
 </code>
@@ Line 14: / Line 25: @@
 ====== Die ======
+{{:mcmaster:nxp:mcimx6z0dvm09ab:shiny.jpg?300|}}
 <code>
 </code>
-[[https://siliconpr0n.org/map/nxp/mcimx6z0dvm09ab/mz_mit20x/|mz_mit20x]]
+[[https://siliconpr0n.org/map/nxp/mcimx6z0dvm09ab/mcmaster_mz_mit20x/|mz_mit20x]]
+    * [[https://siliconpr0n.org/map/nxp/mcimx6z0dvm09ab/single/nxp_mcimx6z0dvm09ab_mcmaster_mz_mit20x.jpg|Single]] (10879x10879, 38.26MB)
+====== Memory ======
+On die memory types:
+  * SRAM (~320 KB?)
+  * ROM (96 KB)
+  * eFuse (256 bytes?)
+Wiki: CMOS 40 nm
+https://www.nxp.com/part/MCIMX6Z0DVM09AB#/
+Ultra Low Cost Linux® Processor with Arm® Cortex®-A7 Core
+MX6ULL
+Stats:
+  * 32 KB L1 Instruction Cache
+  * 32 KB L1 Data Cache
+  * 128 KB unified I/D L2 cache
+  * Boot ROM, including HAB (96 KB)
+  * Internal mucltimedia/shared, fast access RAM (OCRAM, 128 KB)
+    * 8 KB stack
+    * 20 KB MMU table
+  * Number fuses?
+  * No flash or EEPROM
+  * QuadSPI
+    * On die?
+    * TXFIFO size is 512Byte
+    * RXFIFO size is 128Byte
+    * AHB BUF size is 1KByte
+I'm having a hard time estimating how many fuses are present. Addresses listed go from 0x450 to 0x8F0, which each 0x10 increment having 32 fuses. I'd say there are at least 0x20 of these banks though, maybe at most 0x400 to 0xBF0 => 0x80? Maybe around 0x40?
-    * [[https://siliconpr0n.org/map/nxp/mcimx6z0dvm09ab/single/nxp_mcimx6z0dvm09ab_mz_mit20x.jpg|Single]] (10879x10879, 38.26MB)
+Some SEM images: https://twitter.com/johndmcmaster/status/1329707759642689539