mcmaster:nxp:mcimx6z0dvm09ab
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mcmaster:nxp:mcimx6z0dvm09ab [2020/11/17 09:09] – [Memory] mcmaster | mcmaster:nxp:mcimx6z0dvm09ab [2023/02/16 10:17] (current) – external edit 127.0.0.1 | ||
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====== Package ====== | ====== Package ====== | ||
+ | " | ||
{{: | {{: | ||
< | < | ||
+ | *F* | ||
+ | MCIMX6Z0DVM09AB | ||
+ | CTDB1950 | ||
+ | | ||
+ | 1N70S | ||
+ | CHINA MXDBCTJ | ||
</ | </ | ||
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</ | </ | ||
- | [[https:// | + | [[https:// |
- | * [[https:// | + | * [[https:// |
====== Memory ====== | ====== Memory ====== | ||
+ | |||
+ | On die memory types: | ||
+ | * SRAM (~320 KB?) | ||
+ | * ROM (96 KB) | ||
+ | * eFuse (256 bytes?) | ||
Wiki: CMOS 40 nm | Wiki: CMOS 40 nm | ||
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Ultra Low Cost Linux® Processor with Arm® Cortex®-A7 Core | Ultra Low Cost Linux® Processor with Arm® Cortex®-A7 Core | ||
+ | |||
+ | MX6ULL | ||
Stats: | Stats: | ||
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* 128 KB unified I/D L2 cache | * 128 KB unified I/D L2 cache | ||
* Boot ROM, including HAB (96 KB) | * Boot ROM, including HAB (96 KB) | ||
- | * Internal | + | * Internal |
* 8 KB stack | * 8 KB stack | ||
* 20 KB MMU table | * 20 KB MMU table | ||
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I'm having a hard time estimating how many fuses are present. Addresses listed go from 0x450 to 0x8F0, which each 0x10 increment having 32 fuses. I'd say there are at least 0x20 of these banks though, maybe at most 0x400 to 0xBF0 => 0x80? Maybe around 0x40? | I'm having a hard time estimating how many fuses are present. Addresses listed go from 0x450 to 0x8F0, which each 0x10 increment having 32 fuses. I'd say there are at least 0x20 of these banks though, maybe at most 0x400 to 0xBF0 => 0x80? Maybe around 0x40? | ||
+ | |||
+ | Some SEM images: https:// | ||
+ |
mcmaster/nxp/mcimx6z0dvm09ab.1605604198.txt.gz · Last modified: 2020/11/17 09:09 by mcmaster