vendor:fujitsu
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====== Processes ====== | ====== Processes ====== | ||
- | [[https:// | + | ^ Branded vendor |
+ | | Sega | 315-5672 | ||
+ | | Sega | 315-5673 | ||
+ | | Sega | 315-5674 | ||
+ | | SNK | LSPC2-A2 | ||
+ | | Capcom | ||
+ | | Capcom | ||
+ | | Capcom | ||
+ | |||
+ | Refs: | ||
+ | * [[https:// | ||
+ | * Chip IDs on this wiki | ||
+ | * http:// | ||
+ | |||
+ | === CG24 / CG25 gate arrays === | ||
+ | |||
+ | http:// | ||
[[https:// | [[https:// | ||
- | "Patent | + | Patent |
+ | |||
+ | Customization is done by connecting the transistors with metal to form standard logic cells, which are then connected together and to the i/o structures. | ||
+ | |||
+ | * Red: input to cell. | ||
+ | * Green: output from cell. | ||
+ | |||
+ | All pictures are from [[c0: | ||
+ | |||
+ | == Input pin == | ||
+ | Trace connects right behind the bonding pad. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | == Output pin == | ||
+ | Trace connects | ||
+ | |||
+ | {{: | ||
+ | |||
+ | == Bidirectional pin == | ||
+ | One trace for input, and two individual traces for the N and P power transistors to allow tri-stating. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | == Output driver == | ||
+ | Just a power inverter. Uses 3 BCs. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | == Bidirectional pin driver == | ||
+ | Top input is output level, bottom input is enable. Outputs go to the pin structure transistors. | ||
+ | Described page 10 of the MBCG25512 datasheet. Uses 5 BCs. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | == Inverter with 0.5 drive strength == | ||
+ | Uses 0.5 BC. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | == Inverter with 1 drive strength == | ||
+ | Uses 1 BC. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | == 2NAND == | ||
+ | Uses 1 BC. | ||
+ | |||
+ | {{: |
vendor/fujitsu.1512933662.txt.gz · Last modified: 2017/12/10 19:21 by mcmaster