Silicon Pr0n

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[[vendor:xilinx|Xilinx]] CoolRunner-II CPLD family

Made on a 180nm process by [[foundry:umc|UMC]] (([[https://web.archive.org/web/20110110044847/http://www.umc.com/english/news/2002/20020225.asp]])), 4-5 (([[https://web.archive.org/web/20030502052907/http://www.xilinx.com/company/press/kits/cool2/cool2backgrounder.htm|CoolRunner-II Press Backgrounder]])) aluminum metal layers depending on device density. It appears that the 128 and smaller are 4 layers and the 256 and larger are 5.

Full RE of the family (focusing on the 32a) is in progress but there are no immediate plans to release.

^ [[azonenberg:xilinx:xc2c32a|XC2C32A]] (3.24 mm<sup>2</sup>, 4 metal)  ^ [[azonenberg:xilinx:xc2c64a|XC2C64A]] (4.61 mm<sup>2</sup>, 4 metal)  ^ [[azonenberg:xilinx:xc2c128|XC2C128]] (9.59 mm<sup>2</sup>, 4 metal)  ^ [[mcmaster:xilinx:xc2c256|XC2C256]] (15.54 mm<sup>2</sup>, 5 metal)  ^ [[azonenberg:xilinx:xc2c384|XC2C384]] (30.50 mm<sup>2</sup>, 5 metal)  ^ [[azonenberg:xilinx:xc2c512|XC2C512]]  ^
| {{:vendor:xilinx:xc2c32a_bf_neo5x.jpg?122}} \\ X8370 (rev A)          | {{:azonenberg:xilinx:xc2c64a_bf_neo5x.jpg?118}} \\ X8380 (rev A)      | {{:azonenberg:xilinx:xc2c128_bf_neo5x.jpg?167}} \\ X7440 (rev B)      | {{:vendor:xilinx:xc2c256_mz_mit20x_2k.jpg?235}} \\ X7410 (rev C)     | {{:vendor:xilinx:xilinx_xc2c384_mit20x_rotated_4k.jpg?340}} \\ X7450 (rev ??)   | FIXME                                  |

Thumbnail scale: 5 μm/pixel