{{tag>collection_az vendor_microchip type_interface type_interface/serdes type_interface/serdes/ethernet type_network type_network/ethernet foundry_tsmc tech_180nm}}

10/100mbit SPI/parallel Ethernet controller.

====== Package ======

44-pin QFN, decapped live.

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====== Die ======

Rough stitch of old images with Am10x objective. Need to re-shoot at higher resolution.

[[http://siliconpr0n.org/map/microchip/enc424j600/mz_am10x/|Map]]

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Close-up of dense logic area at upper right:

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Partial HF delayer of SRAM. Confirmed to be same process as PIC32 based on SRAM cell pitch.

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