The intention of this table is to allow rough identification of a device's technology node.

This list includes ITRS standard nodes only, tag devices at the nearest appropriate node. Please only tag devices whose process geometry is known for certain; this will allow us to more easily compare examples of devices at each node.

Devices ≤ 90nm typically have thick top metal with a much larger design rule. There do not appear to be significant scaling trends in top metal pitch below 90nm,

There are two Vcore columns. The typical numbers are the nominal operating voltages for standard process, the minimum numbers are the lowest voltages allowed for low-power versions of the process.

Typically devices >180 nm are entirely Al metallization, <130 are Cu except for long-haul power routing. 130-180 can be either.

^Node ^Vcore (min) ^Vcore(typ) ^Layer count ^[[:conventions|Mz]] pitch ^[[:conventions|M1]] pitch ^SRAM (8T) ^ SRAM (6T) ^Notes |
|[[:tech:unknown|Unknown]] |  |N/A |N/A |  |  |  |  | |
|[[:tech:huge|Huge (>10 µm)]] |  |>= 5 |FIXME  |  |  |  |  | |
|[[:tech:10um|10 µm]] |  |FIXME  |FIXME  |  |  |  |  | |
|[[:tech:3um|3 µm]] |  |FIXME  |FIXME  |  |  |  |  | |
|[[:tech:1500nm|1500 nm]] |  |FIXME  |FIXME  |  |  |  |  | |
|[[:tech:1000nm|1000 nm]] |2.5 |3.3 - 5.0 |2 |  |  |  |  | |
|[[:tech:800nm|800 nm]] |2.5 |5.0 |2 |  |  |  |  | |
|[[:tech:600nm|600 nm]] |  |5.0 |2 - 3 |  |  |  |  | |
|[[:tech:350nm|350 nm]] |2.0 |3.3 - 5 |3 - 5 |1700 nm |1525 nm | |46.17 µm<sup>2</sup> |[[:azonenberg:altera:epm3064a|EPM3064A]], [[:azonenberg:microchip:pic12f683|PIC12F683]] |
|[[:tech:250nm|250 / 220 nm]] |  |1.8 - 3.3 |4 - 5 |  |  |  |  | |
|[[:tech:180nm|180 / 150 nm]] |  |1.5 - 1.8 |4 - 6 |1000 - 1550 nm |565 nm | |4.15 µm<sup>2</sup>  |[[:azonenberg:xilinx:xc2c32a|XC2C32A]], [[:azonenberg:micrel:ksz9021rn|KSZ9021RN]], [[:azonenberg:microchip:pic32mx340f512h|PIC32MX340F512H]] |
|[[:tech:130nm|130 / 110 nm]] |  |1.5 - 1.8 |5 - 8 |3200 nm |  | |2.91 µm<sup>2</sup>|[[:azonenberg:cypress:cy8c4245axi|CY8C4245AXI]] |
|[[:tech:90nm|90 nm]] |1.14 |1.2 |7 - 10 |15000 nm |  |3.92 µm<sup>2</sup> | 0.86 - 1.04 µm<sup>2</sup> |[[:azonenberg:xilinx:xc3s50a|XC3S50A]] block RAM (8T), config cells (large 6T) \\ [[http://www.chipworks.com/about-chipworks/overview/blog/review-tsmc-28-nm-process-technology |ChipWorks TSMC 28 nm]] (dense 6T) |
|[[:tech:65nm|65 nm]] |0.95 |1.0 - 1.2 |9 - 12 |14500 - 31500 nm |  | | |[[:azonenberg:ti:am1707bzkb3|AM1707]], [[:azonenberg:butterflylabs:bfsc100f144|BFSC100F144]] |
|[[:tech:45nm|45 / 40 nm]] |0.95 |0.9 - 1.2 |6 - 11 |7100 nm |  |1.38 µm<sup>2</sup>  | |[[:azonenberg:xilinx:xc6slx4|XC6SLX4]] |
|[[:tech:32nm|32 / 28 nm]] |0.92 |0.85 - 1.05 |11 - 12 |  |  | | 0.16 µm<sup>2</sup> | [[http://www.chipworks.com/about-chipworks/overview/blog/review-tsmc-28-nm-process-technology|ChipWorks TSMC 28 nm]]  |
|[[:tech:22nm|22 / 20 nm]] |0.87 |0.9 - 0.95 |9 - 15 |  |  |  |  |
|[[:tech:14nm|16 / 14 nm]] |0.72 |0.85 |13 + MiM |  |54 nm | |0.058 µm<sup>2</sup> |[[http://www.chipworks.com/en/technical-competitive-analysis/resources/blog/intels-14-nm-parts-are-finally-here/|ChipWorks Intel 14nm]] |

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