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- | Backside analysis can include: | ||
- | * Imaging transistor layout without delayering | ||
- | * Imaging transistor activity using PMT, camera, etc for side channnel analysis | ||
- | * Laser fault injection, bypassing security meshes and other things usually in the way | ||
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- | Fabs often thin wafers and perform backside analysis to get at the transistors without going through metal. | ||
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- | Sample preparation example: http:// | ||
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- | ====== Camera ====== | ||
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- | ===== Sample commercial unit ===== | ||
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- | With IR imaging and laser fault injection | ||
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- | Camera: | ||
- | * uEeye Cockpit | ||
- | * ueye IDS camera | ||
- | * U124xSE-NIR | ||
- | * Or maybe: UI24xSE-NIR | ||
- | * think its standard camera they removed IR filter | ||
- | * https:// | ||
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- | ====== Optical fault injection ====== | ||
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- | In its simplest form, a CSP can be strobed with a camera flash | ||
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- | You need to excite the silicon with a photo of wavelength no more than 1.1 um (reference: " | ||
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- | [[Sergei paper|https:// | ||
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- | [[https:// | ||
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- | Solutions include: | ||
- | * [[http:// | ||
- | * [[https:// | ||
- | * ChipWispherer has voltage glitching. Could probably rig something similar up for optical glitching | ||