fet
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fet [2016/01/03 07:17] – mcmaster | fet [2016/01/03 08:02] (current) – [Xilinx XC2018] mcmaster | ||
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====== Examples ====== | ====== Examples ====== | ||
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+ | ===== Gate: poly ===== | ||
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+ | ==== RSA SecurID 1C ==== | ||
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+ | {{: | ||
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+ | Some of contact metal can be seen on the bottom but the gate itself is poly. The [[: | ||
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+ | ==== Xilinx XC2018 ==== | ||
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+ | {{: | ||
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+ | Similar process to the SecurID. | ||
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+ | ==== MOS 6522 ==== | ||
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+ | {{: | ||
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+ | Above: delayered showing poly (textured orange), active (orange), and buried contact (shadow) | ||
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+ | The top polysilicon connects is driven by a via at top left. It crosses the active area to the right to form a transistor. | ||
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+ | The bottom transistor side connects directly from active to poly via a buried contact. | ||
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+ | ==== MOS 6526 ==== | ||
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+ | {{: | ||
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+ | Above: top metal image | ||
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+ | Active area enters lower left and meets poly at a buried contact. | ||
+ | ==== CMOS quiz ==== | ||
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+ | {{: | ||
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+ | [[: | ||
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===== Gate: early metal ===== | ===== Gate: early metal ===== | ||
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==== MOS MPS7083 ==== | ==== MOS MPS7083 ==== | ||
- | {{: | + | {{: |
- | {{: | + | {{: |
Above top: top metal. | Above top: top metal. | ||
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==== Fairchild CD4011 ==== | ==== Fairchild CD4011 ==== | ||
- | {{: | + | {{: |
- | {{: | + | {{: |
Above top: original transistor. | Above top: original transistor. | ||
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Consider staining these to get more info. | Consider staining these to get more info. | ||
- | ===== Gate: poly ===== | ||
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- | ==== RSA SecurID 1C ==== | ||
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- | {{gallery>: | ||
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- | Some of contact metal can be seen on the bottom but the gate itself is poly. The [[: | ||
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- | ==== CMOS quiz ==== | ||
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- | {{: | ||
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- | [[: | ||
====== References ====== | ====== References ====== |
fet.1451805441.txt.gz · Last modified: 2016/01/03 07:17 by mcmaster