• 28 nm
• 40 nm
• 65 nm
• 90 nm
• 0.13 um
• 0.15 um
• 0.18 um
• 0.25 um
• 0.35 um
• 0.5 um
• 0.6 um
• 8“ wafers

4-5 metal layers.

Partial design rules and FIB sections at http://siliconexposed.blogspot.com/2014/02/process-overview-umc-180nm-envm.html

Layouts can vary, as does presence or absence of CMP filler between bond pads.

CMP fill pattern table (measured from XC2C32A)