Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision
Previous revision
Next revisionBoth sides next revision
resistor [2012/07/01 21:54] mcmasterresistor [2012/07/01 22:06] mcmaster
Line 1: Line 1:
-====== Always on transistor ======+====== Depletion load transistor ======
  
 These are arranged with the transistor tied to be always on.  A MOSFET is classified into 3 areas of operation: These are arranged with the transistor tied to be always on.  A MOSFET is classified into 3 areas of operation:
Line 10: Line 10:
     * Triode (VGS < Vth and VDS > (VGS - Vth)): resistive     * Triode (VGS < Vth and VDS > (VGS - Vth)): resistive
     * Saturation (VGS < Vth and VDS < (VGS - Vth)): conductive     * Saturation (VGS < Vth and VDS < (VGS - Vth)): conductive
 +
 +In essence a MOSFET is off if you don't apply any voltage between gate and source.  Its fully on if you apply lots of voltage between drain and source and a little between the gate and source (ie switching a high voltage load).  And then there are the cases in between which is what we want.
  
 Pulldown PMOS resistor on Intel 4004 (IC images courtesy of Flylogic, mask from http://www.4004.com): Pulldown PMOS resistor on Intel 4004 (IC images courtesy of Flylogic, mask from http://www.4004.com):
Line 23: Line 25:
 {{:mcmaster:resistor:pmos_pulldown_sch.png}} {{:mcmaster:resistor:pmos_pulldown_sch.png}}
  
-(FIXME: look into analysisThe metal is VDD (-10V). For PMOS, cutoff occurs when VGS > Vth and assume Vth = -3V or something like that.  If VGS is 0 the resistor does nothing as there is no potential difference.  Now note that since VG = VD and so VGS = VDS)+(FIXME: compare with analysis at [NMOS logic design] The metal is VDD (-10V). For PMOS, cutoff occurs when VGS > Vth and assume Vth = -3V or something like that.  If VGS is 0 the resistor does nothing as there is no potential difference.  Now note that since VG = VD and so VGS = VDS.  We are in the triode region if VDS > VGS - Vth and so if 0 > 0 - -3V or 0 > 3V)
  
  
Line 63: Line 65:
   - Resistor Fabrication on Semiconductor Wafers: http://www.siliconfareast.com/resistor-fab.htm   - Resistor Fabrication on Semiconductor Wafers: http://www.siliconfareast.com/resistor-fab.htm
   - http://uvicrec.blogspot.com/2011/09/understanding-intel-4004.html   - http://uvicrec.blogspot.com/2011/09/understanding-intel-4004.html
 +  - NMOS logic design: http://www.ittc.ku.edu/~jstiles/312/handouts/section_10_4_NMOS_Logic_Design_package.pdf
 +
  
  
 
resistor.txt · Last modified: 2013/10/20 14:59 by 127.0.0.1
 
Except where otherwise noted, content on this wiki is licensed under the following license: CC Attribution 4.0 International
Recent changes RSS feed Donate Powered by PHP Valid XHTML 1.0 Valid CSS Driven by DokuWiki