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carrier:th [2013/10/27 19:33] – [Brown/black] mcmastercarrier:th [2013/10/28 14:22] (current) mcmaster
Line 19: Line 19:
  
  
-====== Single inline (SILpackage ======+====== Single inline package (SIP) ======
  
-====== Dual inline (DIP) package ======+Usually resistor networks but also used for soldered modules/cards and ocassionally ICs. 
 + 
 +Ceramic SIP: 
 + 
 +{{:carrier:csip:fujitsu_edh4464-15_top.jpg?300|}} 
 +{{:carrier:csip:fujitsu_edh4464-15_bot.jpg?300|}} 
 +{{:carrier:csip:fujitsu_edh4464-15_side.jpg?200|}} 
 + 
 + 
 +====== Dual inline package (DIP) ======
  
 ===== Plastic DIP (PDIP) ===== ===== Plastic DIP (PDIP) =====
Line 29: Line 38:
 0.6" PDIP-40 (UMC UM82c55A), a pretty typical DIP: 0.6" PDIP-40 (UMC UM82c55A), a pretty typical DIP:
  
-{{carrier::pdip_umc_um82c55a_top.jpg?300}} +{{carrier:pdip:umc_um82c55a_top.jpg?300}} 
-{{carrier::pdip_umc_um82c55a_bot.jpg?300}}+{{carrier:pdip:umc_um82c55a_bot.jpg?300}}
  
 Older style chip with chip large die cavity (added after molding?): Older style chip with chip large die cavity (added after molding?):
  
-{{carrier::pdip_fd1791-b01_top.jpg?300}} +{{carrier:pdip:fd1791-b01_top.jpg?300}} 
-{{carrier::pdip_fd1791-b01_bot.jpg?300}}+{{carrier:pdip:fd1791-b01_bot.jpg?300}} 
 + 
 +An unusual PDIP which doesn't fully encapsulate the leadframe: 
 + 
 +{{:carrier:pdip:intersil_icm7217aipi_top.jpg?300|}} 
 +{{:carrier:pdip:intersil_icm7217aipi_bot.jpg?300|}} 
 +{{:carrier:pdip:intersil_icm7217aipi_side.jpg?200|}}
  
 One major disadvantage of PDIPs is their relatively poor heat conduction being made primarily of glass.  A 0.3" PDIP-14 with heatsink: One major disadvantage of PDIPs is their relatively poor heat conduction being made primarily of glass.  A 0.3" PDIP-14 with heatsink:
  
-{{carrier::pdip_heatsink_top.jpg?300}} +{{carrier:pdip:heatsink_top.jpg?300}} 
-{{carrier::pdip_heatsink_bot.jpg?300}}+{{carrier:pdip:heatsink_bot.jpg?300}}
  
 Colored PDIPs are uncommon but do exist.  The most common are resistor networks which are typically orange.  0.3" PDIP-16 (Dale MCP1605): Colored PDIPs are uncommon but do exist.  The most common are resistor networks which are typically orange.  0.3" PDIP-16 (Dale MCP1605):
  
-{{carrier::pdip_dale_top.jpg?300}} +{{carrier:pdip:dale_top.jpg?300}} 
-{{carrier::pdip_dale_bot.jpg?300}} +{{carrier:pdip:dale_bot.jpg?300}} 
-{{carrier::pdip_dale_side.jpg?300}}+{{carrier:pdip:dale_side.jpg?200}}
  
  
Line 56: Line 71:
 0.3" PPDIP-16 (330 ohm resistor network): 0.3" PPDIP-16 (330 ohm resistor network):
  
-{{carrier::pdip_16-1-330_top.jpg?300}} +{{carrier:pdip:16-1-330_top.jpg?300}} 
-{{carrier::pdip_16-1-330_bot.jpg?300}} +{{carrier:pdip:16-1-330_bot.jpg?300}} 
-{{carrier::pdip_16-1-330_side.jpg?300}}+{{carrier:pdip:16-1-330_side.jpg?200}}
  
  
Line 64: Line 79:
  
 Was popular before epoxy ("plastic") chips were made commercially viable. Was popular before epoxy ("plastic") chips were made commercially viable.
 +
 +
  
  
Line 71: Line 88:
 A typical package has two fired ceramic halves with a die in a center cavity held together by glass.  Most windowed chips are of this type. A typical package has two fired ceramic halves with a die in a center cavity held together by glass.  Most windowed chips are of this type.
  
 +Its unusual to have the ceramic darker on part of the chip but it does make for a nice label!  I have several that are identical (to the datecode) but does not have this black background...error during silkscreening process?
  
-Its unusual to have the ceramic darker on part of the chip but it does make for nice label!  Probably part of the silkscreening process+{{carrier:cdip:wd_wd8250cl-00_top.jpg?300}} 
 +{{carrier:cdip:wd_wd8250cl-00_bot.jpg?300}} 
 +{{carrier:cdip:wd_wd8250cl-00_side.jpg?200}} 
 + 
 +Erasable chips (typically EPROM but sometimes microcontrollers containing EPROM) have quartz window:
  
-{{carrier::cdip_wd_wd8250cl-00_top.jpg?300}} +{{carrier:cdip:microchip_pic17c64_top.jpg?300}} 
-{{carrier::cdip_wd_wd8250cl-00_bot.jpg?300}} +{{carrier:cdip:microchip_pic17c64_bot.jpg?300}} 
-{{carrier::cdip_wd_wd8250cl-00_side.jpg?200}}+{{carrier:cdip:microchip_pic17c64_side.jpg?200}}
  
  
Line 83: Line 105:
 A typical package is a single co-fired ceramic with a solderable lid.  Optional grounding strap.  These chips were more common in the 70/80s but still continue to see use in high end and military chips.  The last consumer chip I'm aware of was the Pentium 1 which used a dark purple ceramic. A typical package is a single co-fired ceramic with a solderable lid.  Optional grounding strap.  These chips were more common in the 70/80s but still continue to see use in high end and military chips.  The last consumer chip I'm aware of was the Pentium 1 which used a dark purple ceramic.
  
 +Pretty typical package:
  
-=== Windowed ===+{{:carrier:cdip:intel_c2186-25_top.jpg?300}} 
 +{{:carrier:cdip:intel_c2186-25_bot.jpg?300}} 
 +{{:carrier:cdip:intel_c2186-25_side.jpg?200}}
  
-{{carrier::cdip_intel_c8751-8_top.jpg?300}} +Slight variation with the grounding strap soldered directly to the lid: 
-{{carrier::cdip_intel_c8751-8_bot.jpg?300}} + 
-{{carrier::cdip_intel_c8751-8_side.jpg?200}}+{{:carrier:cdip:ti_tms99105ajdl_top.jpg?300}} 
 +{{:carrier:cdip:ti_tms99105ajdl_bot.jpg?300}} 
 +{{:carrier:cdip:ti_tms99105ajdl_side.jpg?200}} 
 + 
 +An unusual package with pins to stack another chip on top (for EPROM for the MCU IIRC in this case): 
 + 
 +{{:carrier:cdip:nat_semi_ns87p50d-11_top.jpg?300}} 
 +{{:carrier:cdip:nat_semi_ns87p50d-11_bot.jpg?300}} 
 +{{:carrier:cdip:nat_semi_ns87p50d-11_side.jpg?200}} 
 + 
 +An unusual package with a lid covering the entire top: 
 + 
 +{{:carrier:cdip:hs_hs9378c_top.jpg?300|}} 
 +{{:carrier:cdip:hs_hs9378c_bot.jpg?300|}} 
 +{{:carrier:cdip:hs_hs9378c_side.jpg?200|}} 
 + 
 +Windowed: 
 + 
 +{{carrier:cdip:intel_c8751-8_top.jpg?300}} 
 +{{carrier:cdip:intel_c8751-8_bot.jpg?300}} 
 +{{carrier:cdip:intel_c8751-8_side.jpg?200}} 
 + 
 +Old windowed package with frosted glass (uncommon): 
 + 
 +{{:carrier:cdip:hitachi_hd462532_top.jpg?300}} 
 +{{:carrier:cdip:hitachi_hd462532_bot.jpg?300}} 
 +{{:carrier:cdip:hitachi_hd462532_side.jpg?200}}
  
  
Line 97: Line 148:
 With metal lid and grounding strap: With metal lid and grounding strap:
  
-{{carrier::cdip_nec_d7220d-1_top.jpg?300}} +{{carrier:cdip:nec_d7220d-1_top.jpg?300}} 
-{{carrier::cdip_nec_d7220d-1_bot.jpg?300}} +{{carrier:cdip:nec_d7220d-1_bot.jpg?300}} 
-{{carrier::cdip_nec_d7220d-1_side.jpg?200}}+{{carrier:cdip:nec_d7220d-1_side.jpg?200}}
  
 A little unusual co-fired ceramic thick film resistor pack: A little unusual co-fired ceramic thick film resistor pack:
  
-{{carrier::cdip_beckman_898-5_top.jpg?300}} +{{carrier:cdip:beckman_898-5_top.jpg?300}} 
-{{carrier::cdip_beckman_898-5_bot.jpg?300}} +{{carrier:cdip:beckman_898-5_bot.jpg?300}} 
-{{carrier::cdip_beckman_898-5_side.jpg?200}}+{{carrier:cdip:beckman_898-5_side.jpg?200}}
  
 An unusual chip with ceramic sandwhiched by metal plates.  I'm unclear if this was co-fired or how the metal was attached? An unusual chip with ceramic sandwhiched by metal plates.  I'm unclear if this was co-fired or how the metal was attached?
  
-{{carrier::cdip_rc31360_top.jpg?300}} +{{carrier:cdip:rc31360_top.jpg?300}} 
-{{carrier::cdip_rc31360_bot.jpg?300}} +{{carrier:cdip:rc31360_bot.jpg?300}} 
-{{carrier::cdip_rc31360_side.jpg?200}}+{{carrier:cdip:rc31360_side.jpg?200}}
  
 This chip is a little unusual in that the gold lid appears to have been painted over to make the chip look uniform white!  You can see gold where the lid was scratched. 1978 date code This chip is a little unusual in that the gold lid appears to have been painted over to make the chip look uniform white!  You can see gold where the lid was scratched. 1978 date code
  
-{{carrier::cdip_white_cb2082_top.jpg?300}} +{{carrier:cdip:white_cb2082_top.jpg?300}} 
-{{carrier::cdip_white_cb2082_bot.jpg?300}}+{{carrier:cdip:white_cb2082_bot.jpg?300}}
  
-Very early ceramic package (1974 date code):+Early ceramic package (1974 date code):
  
-{{carrier::cdip_white_fd502e_top.jpg?300}} +{{carrier:cdip:white_fd502e_top.jpg?300}} 
-{{carrier::cdip_white_fd502e_bot.jpg?300}}+{{carrier:cdip:white_fd502e_bot.jpg?300}}
  
 +Early windowed ceramic package (window missing, 1979 date code?):
  
-==== Windowed ==== +{{:carrier:cdip:intel_c8702a-4_lidless_top.jpg?300}} 
- +{{:carrier:cdip:intel_c8702a-4_lidless_bot.jpg?300}} 
-Erasable chips (typically EPROM but sometimes microcontrollers containing EPROM) have a quartz window: +{{:carrier:cdip:intel_c8702a-4_lidless_side.jpg?200}}
- +
-{{carrier::cdip_microchip_pic17c64_top.jpg?300}} +
-{{carrier::cdip_microchip_pic17c64_bot.jpg?300}} +
-{{carrier::cdip_microchip_pic17c64_side.jpg?200}}+
  
  
Line 137: Line 185:
 Old style: Old style:
  
-{{carrier::xtal_motorola_k1114r_top.jpg?300}} +{{carrier:xtal:motorola_k1114r_top.jpg?300}} 
-{{carrier::xtal_motorola_k1114r_bot.jpg?300}} +{{carrier:xtal:motorola_k1114r_bot.jpg?300}} 
-{{carrier::xtal_motorola_k1114r_side.jpg?300}}+{{carrier:xtal:motorola_k1114r_side.jpg?300}}
  
  
Line 145: Line 193:
  
   * http://en.wikipedia.org/wiki/List_of_integrated_circuit_packaging_types   * http://en.wikipedia.org/wiki/List_of_integrated_circuit_packaging_types
- 
  
carrier/th.1382902437.txt.gz · Last modified: 2013/10/27 19:33 by mcmaster