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--- diode [2012/07/18 14:07] – [CMOS] mcmaster
+++ diode [2013/10/20 14:59] (current) – external edit 127.0.0.1
@@ Line 1: / Line 1: @@
-FIXME: work in progress
 ====== CMOS ======
+FIXME: the polarity I came up with doesn't match other diodes
 N MOSFETs are usually considered completely off when for VGS < Vth and at least partially on otherwise.  Assume VDD > Vth.  Thus, if we have the following circuit:
@@ Line 7: / Line 8: @@
 {{:diode:nfet_transistor.png}}
-First assume Vin = VDD and Vout = 0V which implies VGS = VDD.  Checking for cutoff mode requiring VGS < Vth => VDD < Vth it is not true and so the device is not in cutoff mode.  Next note that VDS = VGS and so checking for saturation mode if VDS > (VGS - Vth) => 0 > -Vth.  As Vth > 0 this always holds and the device is conducting.  Now assume Vin = 0V and Vout = VDD which implies VGS = -VDD.  Checking for cutoff mode requiring VGS < Vth => -VDD < Vth which is true since VDD > Vth.  Therefore, when the left terminal is higher than the right it forward conducts and blocks current when the right terminal is at higher potential than the left.  This roughly yields the following circuit.
+Assuming Vin = VDD and Vout = 0V implies VGS = VDD.  Cutoff mode requires VGS < Vth => VDD < Vth which is not true and so the device is not in cutoff mode.  Next note that VDS = VGS and so checking for saturation mode if VDS > (VGS - Vth) => 0 > -Vth.  As Vth > 0 the device is conducting.  Now assume Vin = 0V and Vout = VDD which implies VGS = -VDD.  Cutoff requires VGS < Vth => -VDD < Vth which is true since VDD > Vth.  Therefore, when the left terminal is higher than the right it forward conducts and blocks current when the right terminal is at higher potential than the left.  This roughly yields the following circuit.
 {{:diode:nfet.png}}
+Similarly, a P MOSFET is considered completely off when VGS > Vth and at least partially on otherwise.  Assume -VDD < Vth.  Thus if we have the following circuit:
+{{:diode:pfet.png}}
+Assuming Vin = VDD and Vout = 0V implies VGS = -VDD.  Cutoff mode requires VGS > Vth => -VDD > Vth which is not true and so the device is not in cutoff mode.  VDS = VGS and so in saturation mode if VDS < (VGS - Vth) => 0 < -Vth.  As Vth < 0 the device is conducting.  Now assume Vin = 0V and Vout = VDD which implies VGS = VDD.  Cutoff requires VGS > Vth => VDD > Vth which is true.  Performing the same conversions we get:
+{{:diode:pfet_diode.png}}
+====== References ======
+  * http://www.aicdesign.org/SCNOTES/2010notes/Lect2UP140_(100325).pdf