tech:start
This is an old revision of the document!
The intention of this table is to allow rough identification of a device's technology node.
This list includes ITRS standard nodes only, tag devices at the nearest appropriate node. Please only tag devices whose process geometry is known for certain; this will allow us to more easily compare examples of devices at each node.
Devices ≤ 90nm typically have thick top metal with a much larger design rule. There do not appear to be significant scaling trends in top metal pitch below 90nm,
Node | Vcore | Layer count | Mz pitch | M1 pitch | SRAM cell size | Notes |
---|---|---|---|---|---|---|
Unknown | N/A | N/A | ||||
Huge (>10 µm) | >= 5 | |||||
10 µm | ||||||
3 µm | ||||||
1500 nm | ||||||
1000 nm | 3.3 - 5 | 2 | ||||
800 nm | 5 | 2 | ||||
600 nm | 5 | 2 - 3 | ||||
350 nm | 3.3 - 5 | 3 - 5 | 1700 nm | 1525 nm | 46.17 µm2 (6T) | EPM3064A, PIC12F683 |
250 / 220 nm | 1.8 - 3.3 | 4 - 5 | ||||
180 / 150 nm | 1.5 - 1.8 | 4 - 6 | 1000 - 1550 nm | 565 nm | 4.15 µm2 (6T) | XC2C32A, KSZ9021RN, PIC32MX340F512H |
130 / 110 nm | 1.5 - 1.8 | 5 - 8 | 3200 nm | 2.91 µm2 (6T) | CY8C4245AXI | |
90 nm | 1.2 | 7 - 10 | 15000 nm | 3.92 µm2 (8T) , 1.04 µm2 (6T) | XC3S50A block RAM (8T), config cells (6T) | |
65 nm | 1.0 - 1.2 | 9 - 12 | 14500 - 31500 nm | AM1707, BFSC100F144 | ||
45 / 40 nm | 0.9 - 1.2 | 6 - 11 | 7100 nm | XC6SLX4 | ||
32 / 28 nm | 0.85 - 1.05 | 11 - 12 | ||||
22 / 20 nm | 0.9 - 0.95 | 9 - 15 | ||||
16 / 14 nm | 0.7 | 13 + MiM | 54 nm | 0.058 µm2 (6T) | ChipWorks Intel 14nm |
tech/start.1431990355.txt.gz · Last modified: 2015/05/18 23:05 by azonenberg